Exam Path Finder
Select Item
organisation_logo
  • Project Associate-I and 1 Other Post in NIT Silchar via Direct Recruitment

    Event Status : Created Event

Timeline

Important Dates

Application Closing Date
20/10/2023
Application Opening Date
05/10/2023

Other Important Information

Appointment Type
Direct Recruitment
Application Submission Method
Online
Qualification Required
Postgraduate
Total Vacancies
2
Advertisement Number
NITS/Dean (RC)/ECE/640/01/2023
Location of Posting/Admission
Cachar District, Assam, India, 788101
Salary
31000, 54000
Work Experience
Yes
Place of Posting/Admission
Silchar, Assam, India
Organisation Type
Educational Institution
Website
http://www.nits.ac.in/
Department/Subject
Electronics and Communication Engineering
Post Type
Contractual
Interview
Yes

Note: This information is common for all posts. For details on specific posts, refer to the official notification.

Posts Released

1. Project Associate-I
2. Project Associate-II

Important Updates

Refer to the official notification for more details.

Application Summary

National Institute of Technology Silchar has released notifications for the Project Associate-I and Project Associate-II posts. Interested candidates can apply from 05/10/2023 to 20/10/2023. Download the official notification for details on eligibility, post information, job procedure, pay scale, and more.

National Institute of Technology Silchar invites applications for the following posts via direct recruitment:

Post Name: Project Associate-I

Essential Qualification: ME/M Tech in Microelectronics and VLSI Design with minimum 8.0 CGPA with good academic record from a recognized University/Institute.

Desirable: Knowledge of working in Linux environment, Knowledge of FPGA, Knowledge of RTL Coding in Verilog, Knowledge of FPGA Implementation, Knowledge of bio-logical background related to the project work.

Post Name: Project Associate-II

Essential Qualification: ME/M Tech in Microelectronics and VLSI Design with minimum 8.0 CGPA with good academic record from a recognized University/Institute.

Essential Work Experience: Minimum 5 Years experience in Chip Design and Tape-out with full knowledge of VLSI CAD Tools Installation and Complete Lab Setup.

Desirable: Knowledge of working in Linux environment, Knowledge of FPGA, Knowledge of RTL Coding in Verilog, Knowledge of FPGA Implementation, Knowledge of bio-logical background related to the project work.

Application send via email to klb@ee.nits.ac.in

For more details related to eligibility criteria, fee, pattern, annexures, place of posting etc. refer to the attachments below.