Senior Project Associate and 1 Other Post in IIEST Shibpur via Walk-in-Interview
Event Status : Created Event
Timeline
Important Dates
Date of Interview | 17/11/2023 |
Application Closing Date | 10/11/2023 |
Application Opening Date | 16/10/2023 |
Other Important Information
Appointment Type | Walk-In-Interview, Research Fellowship |
Application Submission Method | Online |
Age Limit | 18-35 |
Qualification Required | Doctorate, Postgraduate |
Total Vacancies | 2 |
Advertisement Number | VL 1826 |
Location of Posting/Admission | Howrah District, West Bengal, India, 711401 |
Exam | GATE |
Website | https://www.iiests.ac.in/ |
Organisation Type | Educational Institution |
Place of Posting/Admission | Shibpur, Howrah, West Bengal, India |
Post Type | Contractual |
Interview | Yes |
Age Relaxation Type | SC/ST, Other Backward Class, Woman, Person with Benchmark Disabilities |
Salary | 54000, 45000 |
Work Experience | Yes |
Note: This information is common for all posts. For details on specific posts, refer to the official notification.
Posts Released
Important Updates
Refer to the official notification for more details.
Application Summary
Indian Institute of Engineering Science and Technology Shibpur invites application from eligible candidates for Walk-in-Interview for the following posts:
Post Name: Senior Project Associate
Essential Qualification: Ph.D. in VLSI design or related discipline / M. Tech having 3 years of experience in Analog and Mixed Signal Design and research paper publication with 65% marks or 7.0 CGPA along with Institute norms.
Post Name: Project Associate-II
Essential Qualification: M. Tech with domain knowledge in VLSI design and research paper publication with 65% marks or 7.0 CGPA and Institute norms
Desirable Qualification : Experience with Analog and Mixed Signal Design, FPGA, Coding, chip tape-out and IC testing. Applicants with a GATE score will be preferable.
Experience: Experience in Analog and Mixed Signal Design, Design knowledge of low power design, knowledge of RISC-V, experience in chip tape out, product design, and testing. Knowledge of VLSI EDA Tools, Verilog, RTL coding, and Functional Coding using C, Verilog-A and MATLAB.
Place of Interview: School of VLSI Technology Department, IIEST, Shibpur.
Application send via email to hafizur@vlsi.iiests.ac.in
For more details related to eligibility criteria, fee, pattern, annexures, place of posting etc. refer to the attachments below.